Principal Engineer_RTL Design

Upscale Ai

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Pay not listed

  • Full-time
  • India - Bangalore
  • ASIC AI
  • 1mo ago

Job Description

Why join Upscale, Inc. 

Upscale, Inc., is building the high-performance infrastructure powering the next generation of artificial intelligence. Backed by over $300M in funding and rapid global adoption, we are scaling systems designed for the world’s most demanding AI workloads.

We focus on first-principles engineering across silicon, systems, and networking—where performance, scale, and execution are critical. Our team is talent-dense and high-performing. We value ownership, technical rigor, and speed, and we offer the opportunity to work on foundational problems with immediate, real-world impact.

If you’re looking to do high-impact work, move fast, and help define the infrastructure behind the future of AI—Upscale is where you can produce meaningful work at the frontier—and operate at a high standard. 

This is a full-time, on-site Principal ASIC Designer role based in the Greater Bengaluru Area. The individual will be responsible for end-to-end ASIC design activities, including architecture exploration, micro-architecture definition, logic design and RTL development.

Qualifications:
- Solid background in Digital IC Design, including micro-architecture, RTL design, logic synthesis, timing closure, and low-power design techniques.

- Familiarity with industry-standard EDA tools (e.g., Cadence, Synopsys, Mentor) for simulation, synthesis, and static timing analysis.

- Knowledge of ASIC design flows, verification methodologies, and an ability to collaborate with physical design and validation teams.

- Bachelor’s or Master’s degree in Electrical Engineering, Electronics, or a related field (or equivalent practical experience).

- Strong problem-solving skills, attention to detail, and an ability to work collaboratively in a cross-functional, on-site team environment.

- Passionate about ASIC innovation and getting defect-free ASICs to production while meeting time-to-market challenges

- Track record of success with multiple ASIC tape-outs

- 10+ years of industry experience in ASIC design. 

- Experience with networking ASIC design is a plus.

- Experience in post-silicon ASIC bring-up is a plus.